1. Field of the Invention
The present invention relates to a semiconductor memory and a controller for accessing the semiconductor memory.
2. Description of the Related Art
With progress of semiconductor manufacturing technology, the number of elements that can be mounted in a controller of an ASIC (Application Specific IC) or the like is increasing year by year. In response to the rising number of elements, it becomes possible to mount various functional blocks chip, which have conventionally been configured by separate chips, on a single ASIC. As ASICs have more advanced features, the number of external terminals tends to increase. Also, in order to increase a data transfer rate, the number of data terminals tends to increase. Since the size of a pad, which is an external terminal, is determined based on packaging technology, even when the size of elements decreases with progress of semiconductor manufacturing technology, the size of the pad cannot be decreased in the same ratio as that of the size of elements. Also, an electrostatic protection circuit for protecting elements from static electricity and a buffer circuit for inputting/outputting signals from/to outside are generally required for each external terminal. The size of elements in these circuits is larger than that of transistors formed in functional blocks inside a chip. Thus, when the number of external terminals increases, chip size of LSI tends to become larger and chip cost tends to become higher.
On the other hand, to reduce the number of external terminals of a controller, reduction in the number of external terminals also in a semiconductor memory connected to the controller is also demanded. For example, for a DRAM receiving a row address signal and a column address signal in a time-sharing mode, a technology in which a mask signal is received together with a column address signal has been proposed to reduce data mask terminals for masking write data (for example, Japanese Unexamined Patent Application Publication No. 2005-182530). Also, a technology in which a data mask signal is received using an unused column address terminal has been proposed to reduce data mask terminals (for example, Japanese Unexamined Patent Application Publication No. 2000-132964).
Data is generally masked in units of byte. As described above, the number of data terminals tends to increase. In response to the rising number of data terminals, the number of bits of a data mask signal must also be increased. In the conventional technology described above, a data mask signal is supplied using unused bits of a column address signal. Generally, unused bits are about two bits. In that case, only two-byte data can be masked. No technology has been proposed that can mask data without increasing the number of external terminals when the number of bytes of data increases and the number of bits of a data mask signal increases.